Efficient and effective memory management is central to the design of any computer system. Memory management schemes vary from a primitive bare-machine approach to paging and segmentation strategies, with each approach having its own advantages and disadvantages.
By far, the simplest memory management scheme is none at all. The user is simply presented with the bare machine and has complete control over the entire memory space. Such a system provides maximum flexibility to the user, for the user can control the use of memory in whatever manner desired. There is no need for special hardware, nor is there a need for operating system software.
Clearly, the bare machine approach is not appropriate in today's personal computer ("PC") market where the user wishes to flip a switch and begin processing, not at all interested in programming the system or tracking a data path. In today's computer systems and, in particular, in PCs, addressable memory space comprises memory units having different attributes, or performance characteristics.
In some PCs, certain memory addresses are permanently allocated with specific attributes. In these systems, most typically the lowest 640 kilobytes is attributed as cacheable, read-writable random access memory ("RAM"), the next 384 kilobytes is attributed as read-only memory ("ROM") and the remaining addressable space above the megabyte is attributed as non-cacheable, read-writable RAM. To perform an access in these systems, the microprocessor central processing unit ("CPU") makes a request of a memory subsystem. The memory subsystem decodes the address and carries out the request with the knowledge stored in a hard-wired memory attribute map within the memory subsystem. A memory attribute map contains data pertaining to the operating characteristics of the memory in the computer. The hard-wired memory attribute map allows the CPU to make optimal use of the memory by allowing the CPU to adapt its access of the memory as a function of the memory's attributes. Unfortunately, since the memory attribute map is hard-wired and therefore immutable, the memory configuration of the system itself is immutable, restricting the versatility and adaptability of the system to new memory arrangements and technologies.
There are a number of ways to overcome the disadvantages of a hard-wired memory attribute maps. First, the memory subsystem itself could be redesigned to accommodate memory units having different attributes. This is not desirable, however, because it renders obsolete memory subsystem hardware already in existence.
A second solution is to modify existing memory management driver software so that the software has knowledge of the system and the programming features to thereby enable the software to deal with changes in the memory. This solution, as the last, requires software modification, rendering obsolete the available base of driver software.
All of the above-discussed alternatives suffer from a common ailment: they are relatively inflexible, either with respect to memory configuration changes within the system itself or with respect to accommodation of existing hardware and software. Accordingly, what is needed in the art are a circuit and method for accommodating memory attribute changes that are transparent to the remainder of the computer system so as to operate in existing systems.